comparison: components/u8g2/csrc/u8x8_d_ssd1306_48x64.c
components/u8g2/csrc/u8x8_d_ssd1306_48x64.c
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| 1 /* | |
| 2 | |
| 3 u8x8_d_ssd1306_48x64_winstar.c | |
| 4 | |
| 5 Universal 8bit Graphics Library (https://github.com/olikraus/u8g2/) | |
| 6 | |
| 7 Copyright (c) 2016, olikraus@gmail.com | |
| 8 All rights reserved. | |
| 9 | |
| 10 Redistribution and use in source and binary forms, with or without modification, | |
| 11 are permitted provided that the following conditions are met: | |
| 12 | |
| 13 * Redistributions of source code must retain the above copyright notice, this list | |
| 14 of conditions and the following disclaimer. | |
| 15 | |
| 16 * Redistributions in binary form must reproduce the above copyright notice, this | |
| 17 list of conditions and the following disclaimer in the documentation and/or other | |
| 18 materials provided with the distribution. | |
| 19 | |
| 20 THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND | |
| 21 CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, | |
| 22 INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF | |
| 23 MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE | |
| 24 DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR | |
| 25 CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, | |
| 26 SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT | |
| 27 NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; | |
| 28 LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER | |
| 29 CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, | |
| 30 STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) | |
| 31 ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF | |
| 32 ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. | |
| 33 | |
| 34 */ | |
| 35 #include "u8x8.h" | |
| 36 | |
| 37 /* Winstar 0.71 OLED */ | |
| 38 static const uint8_t u8x8_d_ssd1306_48x64_winstar_init_seq[] = | |
| 39 { | |
| 40 | |
| 41 U8X8_START_TRANSFER(), /* enable chip, delay is part of the transfer start */ | |
| 42 | |
| 43 U8X8_C(0x0ae), /* display off */ | |
| 44 U8X8_CA(0x0d5, 0x080), /* clock divide ratio (0x00=1) and oscillator frequency (0x8) */ | |
| 45 U8X8_CA(0x0a8, 0x03f), /* multiplex ratio, 0.71 OLED: changed from 0x2f to 0x3f */ | |
| 46 U8X8_CA(0x0d3, 0x000), /* display offset, 0.71 OLED */ | |
| 47 U8X8_C(0x040), /* set display start line to 0, 0.71 OLED */ | |
| 48 U8X8_CA(0x08d, 0x014), /* [2] charge pump setting (p62): 0x014 enable, 0x010 disable, 0.71 OLED 0x14*/ | |
| 49 | |
| 50 /// according to the datasheet, 0x00 is NOT page addressing mode, but horizontal addressing mode; | |
| 51 /// so it looks like u8g2 expects horizontal addressing (and the inline comment is wrong) while the Winstar example | |
| 52 /// actually uses page addressing (which is the reset default) | |
| 53 U8X8_CA(0x020, 0x000), /* page addressing mode */ | |
| 54 | |
| 55 U8X8_C(0x0a1), /* segment remap a0/a1, 0.71 OLED */ | |
| 56 U8X8_C(0x0c8), /* c0: scan dir normal, c8: reverse, 0.71 OLED */ | |
| 57 // Flipmode | |
| 58 // U8X8_C(0x0a0), /* segment remap a0/a1*/ | |
| 59 // U8X8_C(0x0c0), /* c0: scan dir normal, c8: reverse */ | |
| 60 | |
| 61 U8X8_CA(0x0da, 0x012), /* com pin HW config, sequential com pin config (bit 4), disable left/right remap (bit 5), 0.71 OLED */ | |
| 62 U8X8_CA(0x081, 0x07f), /* [2] set contrast control, 0.71 OLED datasheet: 0x7f */ | |
| 63 U8X8_CA(0x0d9, 0x022), /* [2] pre-charge period 0x022/f1, 0.71 OLED datasheet: 0x22 */ | |
| 64 U8X8_CA(0x0db, 0x040), /* vcomh deselect level, 0.71 OLED datasheet: 0x40 */ | |
| 65 | |
| 66 // U8X8_C(0x02e), /* Deactivate scroll */ | |
| 67 U8X8_C(0x0a4), /* output ram to display */ | |
| 68 U8X8_C(0x0a6), /* none inverted normal display mode */ | |
| 69 | |
| 70 U8X8_END_TRANSFER(), /* disable chip */ | |
| 71 U8X8_END() /* end of sequence */ | |
| 72 }; | |
| 73 | |
| 74 static const uint8_t u8x8_d_ssd1306_48x64_powersave0_seq[] = | |
| 75 { | |
| 76 U8X8_START_TRANSFER(), /* enable chip, delay is part of the transfer start */ | |
| 77 U8X8_C(0x0af), /* display on */ | |
| 78 U8X8_END_TRANSFER(), /* disable chip */ | |
| 79 U8X8_END() /* end of sequence */ | |
| 80 }; | |
| 81 | |
| 82 static const uint8_t u8x8_d_ssd1306_48x64_powersave1_seq[] = | |
| 83 { | |
| 84 U8X8_START_TRANSFER(), /* enable chip, delay is part of the transfer start */ | |
| 85 U8X8_C(0x0ae), /* display off */ | |
| 86 U8X8_END_TRANSFER(), /* disable chip */ | |
| 87 U8X8_END() /* end of sequence */ | |
| 88 }; | |
| 89 | |
| 90 static const uint8_t u8x8_d_ssd1306_48x64_flip0_seq[] = | |
| 91 { | |
| 92 U8X8_START_TRANSFER(), /* enable chip, delay is part of the transfer start */ | |
| 93 U8X8_C(0x0a1), /* segment remap a0/a1*/ | |
| 94 U8X8_C(0x0c8), /* c0: scan dir normal, c8: reverse */ | |
| 95 U8X8_END_TRANSFER(), /* disable chip */ | |
| 96 U8X8_END() /* end of sequence */ | |
| 97 }; | |
| 98 | |
| 99 static const uint8_t u8x8_d_ssd1306_48x64_flip1_seq[] = | |
| 100 { | |
| 101 U8X8_START_TRANSFER(), /* enable chip, delay is part of the transfer start */ | |
| 102 U8X8_C(0x0a0), /* segment remap a0/a1*/ | |
| 103 U8X8_C(0x0c0), /* c0: scan dir normal, c8: reverse */ | |
| 104 U8X8_END_TRANSFER(), /* disable chip */ | |
| 105 U8X8_END() /* end of sequence */ | |
| 106 }; | |
| 107 | |
| 108 static uint8_t u8x8_d_ssd1306_48x64_generic(u8x8_t *u8x8, uint8_t msg, | |
| 109 uint8_t arg_int, void *arg_ptr) | |
| 110 { | |
| 111 uint8_t x, c; | |
| 112 uint8_t *ptr; | |
| 113 switch (msg) | |
| 114 { | |
| 115 /* handled by the calling function | |
| 116 case U8X8_MSG_DISPLAY_SETUP_MEMORY: | |
| 117 u8x8_d_helper_display_setup_memory(u8x8, &u8x8_ssd1306_48x64_display_info); | |
| 118 break; | |
| 119 case U8X8_MSG_DISPLAY_INIT: | |
| 120 u8x8_d_helper_display_init(u8x8); | |
| 121 u8x8_cad_SendSequence(u8x8, u8x8_d_ssd1306_48x64_winstar_init_seq); | |
| 122 break; | |
| 123 */ | |
| 124 case U8X8_MSG_DISPLAY_SET_POWER_SAVE: | |
| 125 if (arg_int == 0) | |
| 126 u8x8_cad_SendSequence(u8x8, u8x8_d_ssd1306_48x64_powersave0_seq); | |
| 127 else | |
| 128 u8x8_cad_SendSequence(u8x8, u8x8_d_ssd1306_48x64_powersave1_seq); | |
| 129 break; | |
| 130 case U8X8_MSG_DISPLAY_SET_FLIP_MODE: | |
| 131 if (arg_int == 0) | |
| 132 { | |
| 133 u8x8_cad_SendSequence(u8x8, u8x8_d_ssd1306_48x64_flip0_seq); | |
| 134 u8x8->x_offset = u8x8->display_info->default_x_offset; | |
| 135 } | |
| 136 else | |
| 137 { | |
| 138 u8x8_cad_SendSequence(u8x8, u8x8_d_ssd1306_48x64_flip1_seq); | |
| 139 u8x8->x_offset = u8x8->display_info->flipmode_x_offset; | |
| 140 } | |
| 141 break; | |
| 142 #ifdef U8X8_WITH_SET_CONTRAST | |
| 143 case U8X8_MSG_DISPLAY_SET_CONTRAST: | |
| 144 u8x8_cad_StartTransfer(u8x8); | |
| 145 u8x8_cad_SendCmd(u8x8, 0x081); | |
| 146 u8x8_cad_SendArg(u8x8, arg_int); /* ssd1306 has range from 0 to 255 */ | |
| 147 u8x8_cad_EndTransfer(u8x8); | |
| 148 break; | |
| 149 #endif | |
| 150 case U8X8_MSG_DISPLAY_DRAW_TILE: | |
| 151 u8x8_cad_StartTransfer(u8x8); | |
| 152 x = ((u8x8_tile_t *) arg_ptr)->x_pos; | |
| 153 x *= 8; | |
| 154 x += u8x8->x_offset; | |
| 155 u8x8_cad_SendCmd(u8x8, 0x010 | (x >> 4)); | |
| 156 u8x8_cad_SendCmd(u8x8, 0x000 | ((x & 15))); | |
| 157 u8x8_cad_SendCmd(u8x8, 0x0b0 | (((u8x8_tile_t *) arg_ptr)->y_pos)); | |
| 158 | |
| 159 do | |
| 160 { | |
| 161 c = ((u8x8_tile_t *) arg_ptr)->cnt; | |
| 162 ptr = ((u8x8_tile_t *) arg_ptr)->tile_ptr; | |
| 163 u8x8_cad_SendData(u8x8, c * 8, ptr); /* note: SendData can not handle more than 255 bytes */ | |
| 164 arg_int--; | |
| 165 } while (arg_int > 0); | |
| 166 | |
| 167 u8x8_cad_EndTransfer(u8x8); | |
| 168 break; | |
| 169 default: | |
| 170 return 0; | |
| 171 } | |
| 172 return 1; | |
| 173 } | |
| 174 | |
| 175 static const u8x8_display_info_t u8x8_ssd1306_48x64_display_info = | |
| 176 { | |
| 177 /* chip_enable_level = */0, | |
| 178 /* chip_disable_level = */1, | |
| 179 | |
| 180 /* post_chip_enable_wait_ns = */20, | |
| 181 /* pre_chip_disable_wait_ns = */10, | |
| 182 /* reset_pulse_width_ms = */100, /* SSD1306: 3 us */ | |
| 183 /* post_reset_wait_ms = */100, /* far east OLEDs need much longer setup time */ | |
| 184 /* sda_setup_time_ns = */50, /* SSD1306: 15ns, but cycle time is 100ns, so use 100/2 */ | |
| 185 /* sck_pulse_width_ns = */50, /* SSD1306: 20ns, but cycle time is 100ns, so use 100/2, AVR: below 70: 8 MHz, >= 70 --> 4MHz clock */ | |
| 186 /* sck_clock_hz = */8000000UL, /* since Arduino 1.6.0, the SPI bus speed in Hz. Should be 1000000000/sck_pulse_width_ns, increased to 8MHz (issue 215) */ | |
| 187 /* spi_mode = */0, /* active high, rising edge */ | |
| 188 /* i2c_bus_clock_100kHz = */4, | |
| 189 /* data_setup_time_ns = */40, | |
| 190 /* write_pulse_width_ns = */150, /* SSD1306: cycle time is 300ns, so use 300/2 = 150 */ | |
| 191 /* tile_width = */6, | |
| 192 /* tile_height = */8, | |
| 193 /* default_x_offset = */40, | |
| 194 /* flipmode_x_offset = */40, | |
| 195 /* pixel_width = */48, | |
| 196 /* pixel_height = */64 }; | |
| 197 | |
| 198 /* Winstar 0.71" OLED */ | |
| 199 uint8_t u8x8_d_ssd1306_48x64_winstar(u8x8_t *u8x8, uint8_t msg, uint8_t arg_int, | |
| 200 void *arg_ptr) | |
| 201 { | |
| 202 if (msg == U8X8_MSG_DISPLAY_SETUP_MEMORY) | |
| 203 { | |
| 204 u8x8_d_helper_display_setup_memory(u8x8, &u8x8_ssd1306_48x64_display_info); | |
| 205 return 1; | |
| 206 } | |
| 207 else if (msg == U8X8_MSG_DISPLAY_INIT) | |
| 208 { | |
| 209 u8x8_d_helper_display_init(u8x8); | |
| 210 u8x8_cad_SendSequence(u8x8, u8x8_d_ssd1306_48x64_winstar_init_seq); | |
| 211 return 1; | |
| 212 } | |
| 213 return u8x8_d_ssd1306_48x64_generic(u8x8, msg, arg_int, arg_ptr); | |
| 214 } | |
| 215 |
