comparison: components/u8g2/csrc/u8x8_d_ssd1306_64x32.c
components/u8g2/csrc/u8x8_d_ssd1306_64x32.c
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| 1 /* | |
| 2 | |
| 3 u8x8_d_ssd1306_64x32.c | |
| 4 | |
| 5 Universal 8bit Graphics Library (https://github.com/olikraus/u8g2/) | |
| 6 | |
| 7 Copyright (c) 2016, olikraus@gmail.com | |
| 8 All rights reserved. | |
| 9 | |
| 10 Redistribution and use in source and binary forms, with or without modification, | |
| 11 are permitted provided that the following conditions are met: | |
| 12 | |
| 13 * Redistributions of source code must retain the above copyright notice, this list | |
| 14 of conditions and the following disclaimer. | |
| 15 | |
| 16 * Redistributions in binary form must reproduce the above copyright notice, this | |
| 17 list of conditions and the following disclaimer in the documentation and/or other | |
| 18 materials provided with the distribution. | |
| 19 | |
| 20 THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND | |
| 21 CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, | |
| 22 INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF | |
| 23 MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE | |
| 24 DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR | |
| 25 CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, | |
| 26 SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT | |
| 27 NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; | |
| 28 LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER | |
| 29 CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, | |
| 30 STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) | |
| 31 ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF | |
| 32 ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. | |
| 33 | |
| 34 */ | |
| 35 | |
| 36 | |
| 37 #include "u8x8.h" | |
| 38 | |
| 39 | |
| 40 | |
| 41 | |
| 42 static const uint8_t u8x8_d_ssd1306_64x32_powersave0_seq[] = { | |
| 43 U8X8_START_TRANSFER(), /* enable chip, delay is part of the transfer start */ | |
| 44 U8X8_C(0x0af), /* display on */ | |
| 45 U8X8_END_TRANSFER(), /* disable chip */ | |
| 46 U8X8_END() /* end of sequence */ | |
| 47 }; | |
| 48 | |
| 49 static const uint8_t u8x8_d_ssd1306_64x32_powersave1_seq[] = { | |
| 50 U8X8_START_TRANSFER(), /* enable chip, delay is part of the transfer start */ | |
| 51 U8X8_C(0x0ae), /* display off */ | |
| 52 U8X8_END_TRANSFER(), /* disable chip */ | |
| 53 U8X8_END() /* end of sequence */ | |
| 54 }; | |
| 55 | |
| 56 static const uint8_t u8x8_d_ssd1306_64x32_flip0_seq[] = { | |
| 57 U8X8_START_TRANSFER(), /* enable chip, delay is part of the transfer start */ | |
| 58 U8X8_C(0x0a1), /* segment remap a0/a1*/ | |
| 59 U8X8_C(0x0c8), /* c0: scan dir normal, c8: reverse */ | |
| 60 U8X8_END_TRANSFER(), /* disable chip */ | |
| 61 U8X8_END() /* end of sequence */ | |
| 62 }; | |
| 63 | |
| 64 static const uint8_t u8x8_d_ssd1306_64x32_flip1_seq[] = { | |
| 65 U8X8_START_TRANSFER(), /* enable chip, delay is part of the transfer start */ | |
| 66 U8X8_C(0x0a0), /* segment remap a0/a1*/ | |
| 67 U8X8_C(0x0c0), /* c0: scan dir normal, c8: reverse */ | |
| 68 U8X8_END_TRANSFER(), /* disable chip */ | |
| 69 U8X8_END() /* end of sequence */ | |
| 70 }; | |
| 71 | |
| 72 | |
| 73 static uint8_t u8x8_d_ssd1306_64x32_generic(u8x8_t *u8x8, uint8_t msg, uint8_t arg_int, void *arg_ptr) | |
| 74 { | |
| 75 uint8_t x, c; | |
| 76 uint8_t *ptr; | |
| 77 switch(msg) | |
| 78 { | |
| 79 /* handled by the calling function | |
| 80 case U8X8_MSG_DISPLAY_SETUP_MEMORY: | |
| 81 u8x8_d_helper_display_setup_memory(u8x8, &u8x8_ssd1306_64x32_display_info); | |
| 82 break; | |
| 83 case U8X8_MSG_DISPLAY_INIT: | |
| 84 u8x8_d_helper_display_init(u8x8); | |
| 85 u8x8_cad_SendSequence(u8x8, u8x8_d_ssd1306_64x32_noname_init_seq); | |
| 86 break; | |
| 87 */ | |
| 88 case U8X8_MSG_DISPLAY_SET_POWER_SAVE: | |
| 89 if ( arg_int == 0 ) | |
| 90 u8x8_cad_SendSequence(u8x8, u8x8_d_ssd1306_64x32_powersave0_seq); | |
| 91 else | |
| 92 u8x8_cad_SendSequence(u8x8, u8x8_d_ssd1306_64x32_powersave1_seq); | |
| 93 break; | |
| 94 case U8X8_MSG_DISPLAY_SET_FLIP_MODE: | |
| 95 if ( arg_int == 0 ) | |
| 96 { | |
| 97 u8x8_cad_SendSequence(u8x8, u8x8_d_ssd1306_64x32_flip0_seq); | |
| 98 u8x8->x_offset = u8x8->display_info->default_x_offset; | |
| 99 } | |
| 100 else | |
| 101 { | |
| 102 u8x8_cad_SendSequence(u8x8, u8x8_d_ssd1306_64x32_flip1_seq); | |
| 103 u8x8->x_offset = u8x8->display_info->flipmode_x_offset; | |
| 104 } | |
| 105 break; | |
| 106 #ifdef U8X8_WITH_SET_CONTRAST | |
| 107 case U8X8_MSG_DISPLAY_SET_CONTRAST: | |
| 108 u8x8_cad_StartTransfer(u8x8); | |
| 109 u8x8_cad_SendCmd(u8x8, 0x081 ); | |
| 110 u8x8_cad_SendArg(u8x8, arg_int ); /* ssd1306 has range from 0 to 255 */ | |
| 111 u8x8_cad_EndTransfer(u8x8); | |
| 112 break; | |
| 113 #endif | |
| 114 case U8X8_MSG_DISPLAY_DRAW_TILE: | |
| 115 u8x8_cad_StartTransfer(u8x8); | |
| 116 x = ((u8x8_tile_t *)arg_ptr)->x_pos; | |
| 117 x *= 8; | |
| 118 x += u8x8->x_offset; | |
| 119 u8x8_cad_SendCmd(u8x8, 0x010 | (x>>4) ); | |
| 120 u8x8_cad_SendCmd(u8x8, 0x000 | ((x&15))); | |
| 121 u8x8_cad_SendCmd(u8x8, 0x0b0 | (((u8x8_tile_t *)arg_ptr)->y_pos)); | |
| 122 | |
| 123 do | |
| 124 { | |
| 125 c = ((u8x8_tile_t *)arg_ptr)->cnt; | |
| 126 ptr = ((u8x8_tile_t *)arg_ptr)->tile_ptr; | |
| 127 u8x8_cad_SendData(u8x8, c*8, ptr); /* note: SendData can not handle more than 255 bytes */ | |
| 128 arg_int--; | |
| 129 } while( arg_int > 0 ); | |
| 130 | |
| 131 u8x8_cad_EndTransfer(u8x8); | |
| 132 break; | |
| 133 default: | |
| 134 return 0; | |
| 135 } | |
| 136 return 1; | |
| 137 } | |
| 138 | |
| 139 /*======================================================*/ | |
| 140 | |
| 141 static const u8x8_display_info_t u8x8_ssd1306_64x32_display_info = | |
| 142 { | |
| 143 /* chip_enable_level = */ 0, | |
| 144 /* chip_disable_level = */ 1, | |
| 145 | |
| 146 /* post_chip_enable_wait_ns = */ 20, | |
| 147 /* pre_chip_disable_wait_ns = */ 10, | |
| 148 /* reset_pulse_width_ms = */ 100, /* SSD1306: 3 us */ | |
| 149 /* post_reset_wait_ms = */ 100, /* far east OLEDs need much longer setup time */ | |
| 150 /* sda_setup_time_ns = */ 50, /* SSD1306: 15ns, but cycle time is 100ns, so use 100/2 */ | |
| 151 /* sck_pulse_width_ns = */ 50, /* SSD1306: 20ns, but cycle time is 100ns, so use 100/2, AVR: below 70: 8 MHz, >= 70 --> 4MHz clock */ | |
| 152 /* sck_clock_hz = */ 8000000UL, /* since Arduino 1.6.0, the SPI bus speed in Hz. Should be 1000000000/sck_pulse_width_ns, increased to 8MHz (issue 215) */ | |
| 153 /* spi_mode = */ 0, /* active high, rising edge */ | |
| 154 /* i2c_bus_clock_100kHz = */ 4, | |
| 155 /* data_setup_time_ns = */ 40, | |
| 156 /* write_pulse_width_ns = */ 150, /* SSD1306: cycle time is 300ns, so use 300/2 = 150 */ | |
| 157 /* tile_width = */ 8, | |
| 158 /* tile_hight = */ 4, | |
| 159 /* default_x_offset = */ 32, | |
| 160 /* flipmode_x_offset = */ 32, | |
| 161 /* pixel_width = */ 64, | |
| 162 /* pixel_height = */ 32 | |
| 163 }; | |
| 164 | |
| 165 | |
| 166 /*======================================================*/ | |
| 167 | |
| 168 static const uint8_t u8x8_d_ssd1306_64x32_noname_init_seq[] = { | |
| 169 U8X8_START_TRANSFER(), /* enable chip, delay is part of the transfer start */ | |
| 170 | |
| 171 U8X8_C(0x0ae), /* display off */ | |
| 172 U8X8_CA(0x0d5, 0x080), /* clock divide ratio (0x00=1) and oscillator frequency (0x8) */ | |
| 173 U8X8_CA(0x0a8, 0x02f), /* multiplex ratio: changed from 0x1f to 0x2f */ | |
| 174 U8X8_CA(0x0d3, 0x000), /* display offset */ | |
| 175 U8X8_C(0x040), /* set display start line to 0 */ | |
| 176 U8X8_CA(0x08d, 0x014), /* [2] charge pump setting (p62): 0x014 enable, 0x010 disable */ | |
| 177 U8X8_CA(0x020, 0x000), /* page addressing mode */ | |
| 178 | |
| 179 U8X8_C(0x0a1), /* segment remap a0/a1 */ | |
| 180 U8X8_C(0x0c8), /* c0: scan dir normal, c8: reverse */ | |
| 181 // Flipmode | |
| 182 // U8X8_C(0x0a0), /* segment remap a0/a1*/ | |
| 183 // U8X8_C(0x0c0), /* c0: scan dir normal, c8: reverse */ | |
| 184 | |
| 185 U8X8_CA(0x0da, 0x012), /* com pin HW config, sequential com pin config (bit 4), disable left/right remap (bit 5) */ | |
| 186 U8X8_CA(0x081, 0x0cf), /* [2] set contrast control datasheet: 0xcf */ | |
| 187 U8X8_CA(0x0d9, 0x022), /* [2] pre-charge period 0x022/f1 */ | |
| 188 U8X8_CA(0x0db, 0x000), /* vcomh deselect level */ | |
| 189 | |
| 190 U8X8_C(0x02e), /* Deactivate scroll */ | |
| 191 U8X8_C(0x0a4), /* output ram to display */ | |
| 192 U8X8_C(0x0a6), /* none inverted normal display mode */ | |
| 193 | |
| 194 U8X8_END_TRANSFER(), /* disable chip */ | |
| 195 U8X8_END() /* end of sequence */ | |
| 196 }; | |
| 197 | |
| 198 uint8_t u8x8_d_ssd1306_64x32_noname(u8x8_t *u8x8, uint8_t msg, uint8_t arg_int, void *arg_ptr) | |
| 199 { | |
| 200 if ( msg == U8X8_MSG_DISPLAY_SETUP_MEMORY ) | |
| 201 { | |
| 202 u8x8_d_helper_display_setup_memory(u8x8, &u8x8_ssd1306_64x32_display_info); | |
| 203 return 1; | |
| 204 } | |
| 205 else if ( msg == U8X8_MSG_DISPLAY_INIT ) | |
| 206 { | |
| 207 u8x8_d_helper_display_init(u8x8); | |
| 208 u8x8_cad_SendSequence(u8x8, u8x8_d_ssd1306_64x32_noname_init_seq); | |
| 209 return 1; | |
| 210 } | |
| 211 return u8x8_d_ssd1306_64x32_generic(u8x8, msg, arg_int, arg_ptr); | |
| 212 } | |
| 213 | |
| 214 | |
| 215 /*======================================================*/ | |
| 216 | |
| 217 static const uint8_t u8x8_d_ssd1306_64x32_1f_init_seq[] = { | |
| 218 U8X8_START_TRANSFER(), /* enable chip, delay is part of the transfer start */ | |
| 219 | |
| 220 U8X8_C(0x0ae), /* display off */ | |
| 221 U8X8_CA(0x0d5, 0x080), /* clock divide ratio (0x00=1) and oscillator frequency (0x8) */ | |
| 222 U8X8_CA(0x0a8, 0x01f), /* multiplex ratio: changed from 0x1f to 0x2f, 23 Sep 17: changed back to 1f */ | |
| 223 U8X8_CA(0x0d3, 0x000), /* display offset */ | |
| 224 U8X8_C(0x040), /* set display start line to 0 */ | |
| 225 U8X8_CA(0x08d, 0x014), /* [2] charge pump setting (p62): 0x014 enable, 0x010 disable */ | |
| 226 U8X8_CA(0x020, 0x000), /* page addressing mode */ | |
| 227 | |
| 228 U8X8_C(0x0a1), /* segment remap a0/a1 */ | |
| 229 U8X8_C(0x0c8), /* c0: scan dir normal, c8: reverse */ | |
| 230 | |
| 231 U8X8_CA(0x0da, 0x012), /* com pin HW config, sequential com pin config (bit 4), disable left/right remap (bit 5) */ | |
| 232 U8X8_CA(0x081, 0x0cf), /* [2] set contrast control datasheet: 0xcf */ | |
| 233 U8X8_CA(0x0d9, 0x022), /* [2] pre-charge period 0x022/f1 */ | |
| 234 U8X8_CA(0x0db, 0x000), /* vcomh deselect level */ | |
| 235 | |
| 236 U8X8_C(0x02e), /* Deactivate scroll */ | |
| 237 U8X8_C(0x0a4), /* output ram to display */ | |
| 238 U8X8_C(0x0a6), /* none inverted normal display mode */ | |
| 239 | |
| 240 U8X8_END_TRANSFER(), /* disable chip */ | |
| 241 U8X8_END() /* end of sequence */ | |
| 242 }; | |
| 243 | |
| 244 uint8_t u8x8_d_ssd1306_64x32_1f(u8x8_t *u8x8, uint8_t msg, uint8_t arg_int, void *arg_ptr) | |
| 245 { | |
| 246 if ( msg == U8X8_MSG_DISPLAY_SETUP_MEMORY ) | |
| 247 { | |
| 248 u8x8_d_helper_display_setup_memory(u8x8, &u8x8_ssd1306_64x32_display_info); | |
| 249 return 1; | |
| 250 } | |
| 251 else if ( msg == U8X8_MSG_DISPLAY_INIT ) | |
| 252 { | |
| 253 u8x8_d_helper_display_init(u8x8); | |
| 254 u8x8_cad_SendSequence(u8x8, u8x8_d_ssd1306_64x32_1f_init_seq); | |
| 255 return 1; | |
| 256 } | |
| 257 return u8x8_d_ssd1306_64x32_generic(u8x8, msg, arg_int, arg_ptr); | |
| 258 } |
