components/u8g2/csrc/u8x8_d_ssd1317.c

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1 /*
2
3 u8x8_d_ssd1317.c
4
5 Universal 8bit Graphics Library (https://github.com/olikraus/u8g2/)
6
7 Copyright (c) 2018, olikraus@gmail.com
8 All rights reserved.
9
10 Redistribution and use in source and binary forms, with or without modification,
11 are permitted provided that the following conditions are met:
12
13 * Redistributions of source code must retain the above copyright notice, this list
14 of conditions and the following disclaimer.
15
16 * Redistributions in binary form must reproduce the above copyright notice, this
17 list of conditions and the following disclaimer in the documentation and/or other
18 materials provided with the distribution.
19
20 THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND
21 CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
22 INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
23 MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
24 DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR
25 CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
26 SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
27 NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
28 LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
29 CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
30 STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
31 ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
32 ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
33
34
35 SSD1317: 128x96 OLED
36
37 https://github.com/olikraus/u8g2/issues/663
38
39 */
40
41
42 #include "u8x8.h"
43
44
45
46 /* more or less generic setup of all these small OLEDs */
47 static const uint8_t u8x8_d_ssd1317_96x96_init_seq[] = {
48
49 U8X8_START_TRANSFER(), /* enable chip, delay is part of the transfer start */
50
51
52 U8X8_C(0x0ae), /* display off */
53 U8X8_CA(0x0d5, 0x0d1), /* clock divide ratio (0x00=1) and oscillator frequency (0x8) */
54 U8X8_CA(0x0a8, 0x05f), /* multiplex ratio */
55 U8X8_CA(0x0d3, 0x000), /* display offset */
56 U8X8_CA(0x0a2, 0x000), /* set display start line to 0 */
57 U8X8_CA(0x08d, 0x014), /* [2] charge pump setting (p62): 0x014 enable, 0x010 disable, SSD1306 only, should be removed for SH1106 */
58 U8X8_CA(0x020, 0x000), /* page addressing mode */
59
60 U8X8_C(0x0a0), /* segment remap a0/a1*/
61 U8X8_C(0x0c8), /* c0: scan dir normal, c8: reverse */
62
63 // Flipmode
64 //U8X8_C(0x0a1), /* segment remap a0/a1*/
65 //U8X8_C(0x0c0), /* c0: scan dir normal, c8: reverse */
66
67 U8X8_CA(0x0da, 0x012), /* com pin HW config, sequential com pin config (bit 4), disable left/right remap (bit 5) */
68
69 U8X8_CA(0x081, 0x09f), /* [2] set contrast control */
70 U8X8_CA(0x0d9, 0x0f1), /* [2] pre-charge period 0x022/f1*/
71 U8X8_CA(0x0db, 0x0ff), /* vcomh deselect level */
72
73 // if vcomh is 0, then this will give the biggest range for contrast control issue #98
74 // restored the old values for the noname constructor, because vcomh=0 will not work for all OLEDs, #116
75
76 U8X8_C(0x02e), /* Deactivate scroll */
77 U8X8_C(0x0a4), /* output ram to display */
78 U8X8_C(0x0a6), /* none inverted normal display mode */
79
80 U8X8_END_TRANSFER(), /* disable chip */
81 U8X8_END() /* end of sequence */
82 };
83
84
85
86 static const uint8_t u8x8_d_ssd1317_96x96_powersave0_seq[] = {
87 U8X8_START_TRANSFER(), /* enable chip, delay is part of the transfer start */
88 U8X8_C(0x0af), /* display on */
89 U8X8_END_TRANSFER(), /* disable chip */
90 U8X8_END() /* end of sequence */
91 };
92
93 static const uint8_t u8x8_d_ssd1317_96x96_powersave1_seq[] = {
94 U8X8_START_TRANSFER(), /* enable chip, delay is part of the transfer start */
95 U8X8_C(0x0ae), /* display off */
96 U8X8_END_TRANSFER(), /* disable chip */
97 U8X8_END() /* end of sequence */
98 };
99
100 static const uint8_t u8x8_d_ssd1317_96x96_flip0_seq[] = {
101 U8X8_START_TRANSFER(), /* enable chip, delay is part of the transfer start */
102 U8X8_C(0x0a1), /* segment remap a0/a1*/
103 U8X8_C(0x0c8), /* c0: scan dir normal, c8: reverse */
104 U8X8_END_TRANSFER(), /* disable chip */
105 U8X8_END() /* end of sequence */
106 };
107
108 static const uint8_t u8x8_d_ssd1317_96x96_flip1_seq[] = {
109 U8X8_START_TRANSFER(), /* enable chip, delay is part of the transfer start */
110 U8X8_C(0x0a0), /* segment remap a0/a1*/
111 U8X8_C(0x0c8), /* c0: scan dir normal, c8: reverse */
112 U8X8_END_TRANSFER(), /* disable chip */
113 U8X8_END() /* end of sequence */
114 };
115
116
117 static uint8_t u8x8_d_ssd1317_generic(u8x8_t *u8x8, uint8_t msg, uint8_t arg_int, void *arg_ptr)
118 {
119 uint8_t x, c;
120 uint8_t *ptr;
121 switch(msg)
122 {
123 /* handled by the calling function
124 case U8X8_MSG_DISPLAY_SETUP_MEMORY:
125 u8x8_d_helper_display_setup_memory(u8x8, &u8x8_ssd1317_96x96_display_info);
126 break;
127 */
128 /* handled by the calling function
129 case U8X8_MSG_DISPLAY_INIT:
130 u8x8_d_helper_display_init(u8x8);
131 u8x8_cad_SendSequence(u8x8, u8x8_d_ssd1317_96x96_init_seq);
132 break;
133 */
134 case U8X8_MSG_DISPLAY_SET_POWER_SAVE:
135 if ( arg_int == 0 )
136 u8x8_cad_SendSequence(u8x8, u8x8_d_ssd1317_96x96_powersave0_seq);
137 else
138 u8x8_cad_SendSequence(u8x8, u8x8_d_ssd1317_96x96_powersave1_seq);
139 break;
140 case U8X8_MSG_DISPLAY_SET_FLIP_MODE:
141 if ( arg_int == 0 )
142 {
143 u8x8_cad_SendSequence(u8x8, u8x8_d_ssd1317_96x96_flip0_seq);
144 u8x8->x_offset = u8x8->display_info->default_x_offset;
145 }
146 else
147 {
148 u8x8_cad_SendSequence(u8x8, u8x8_d_ssd1317_96x96_flip1_seq);
149 u8x8->x_offset = u8x8->display_info->flipmode_x_offset;
150 }
151 break;
152 #ifdef U8X8_WITH_SET_CONTRAST
153 case U8X8_MSG_DISPLAY_SET_CONTRAST:
154 u8x8_cad_StartTransfer(u8x8);
155 u8x8_cad_SendCmd(u8x8, 0x081 );
156 u8x8_cad_SendArg(u8x8, arg_int ); /* ssd1306 has range from 0 to 255 */
157 u8x8_cad_EndTransfer(u8x8);
158 break;
159 #endif
160 case U8X8_MSG_DISPLAY_DRAW_TILE:
161 u8x8_cad_StartTransfer(u8x8);
162 x = ((u8x8_tile_t *)arg_ptr)->x_pos;
163 x *= 8;
164 x += u8x8->x_offset;
165
166 u8x8_cad_SendCmd(u8x8, 0x040 ); /* set line offset to 0 */
167
168 u8x8_cad_SendCmd(u8x8, 0x010 | (x>>4) );
169 u8x8_cad_SendArg(u8x8, 0x000 | ((x&15))); /* probably wrong, should be SendCmd */
170 u8x8_cad_SendArg(u8x8, 0x0b0 | (((u8x8_tile_t *)arg_ptr)->y_pos)); /* probably wrong, should be SendCmd */
171
172
173 do
174 {
175 c = ((u8x8_tile_t *)arg_ptr)->cnt;
176 ptr = ((u8x8_tile_t *)arg_ptr)->tile_ptr;
177 u8x8_cad_SendData(u8x8, c*8, ptr); /* note: SendData can not handle more than 255 bytes */
178 /*
179 do
180 {
181 u8x8_cad_SendData(u8x8, 8, ptr);
182 ptr += 8;
183 c--;
184 } while( c > 0 );
185 */
186 arg_int--;
187 } while( arg_int > 0 );
188
189 u8x8_cad_EndTransfer(u8x8);
190 break;
191 default:
192 return 0;
193 }
194 return 1;
195 }
196
197
198 static const u8x8_display_info_t u8x8_ssd1317_96x96_display_info =
199 {
200 /* chip_enable_level = */ 0,
201 /* chip_disable_level = */ 1,
202
203 /* post_chip_enable_wait_ns = */ 20,
204 /* pre_chip_disable_wait_ns = */ 10,
205 /* reset_pulse_width_ms = */ 100, /* SSD1306: 3 us */
206 /* post_reset_wait_ms = */ 100, /* far east OLEDs need much longer setup time */
207 /* sda_setup_time_ns = */ 50, /* SSD1306: 15ns, but cycle time is 100ns, so use 100/2 */
208 /* sck_pulse_width_ns = */ 50, /* SSD1306: 20ns, but cycle time is 100ns, so use 100/2, AVR: below 70: 8 MHz, >= 70 --> 4MHz clock */
209 /* sck_clock_hz = */ 8000000UL, /* since Arduino 1.6.0, the SPI bus speed in Hz. Should be 1000000000/sck_pulse_width_ns */
210 /* spi_mode = */ 0, /* active high, rising edge */
211 /* i2c_bus_clock_100kHz = */ 4,
212 /* data_setup_time_ns = */ 40,
213 /* write_pulse_width_ns = */ 150, /* SSD1306: cycle time is 300ns, so use 300/2 = 150 */
214 /* tile_width = */ 12,
215 /* tile_hight = */ 12,
216 /* default_x_offset = */ 16,
217 /* flipmode_x_offset = */ 16,
218 /* pixel_width = */ 96,
219 /* pixel_height = */ 96
220 };
221
222 uint8_t u8x8_d_ssd1317_96x96(u8x8_t *u8x8, uint8_t msg, uint8_t arg_int, void *arg_ptr)
223 {
224
225 if ( u8x8_d_ssd1317_generic(u8x8, msg, arg_int, arg_ptr) != 0 )
226 return 1;
227
228 switch(msg)
229 {
230 case U8X8_MSG_DISPLAY_INIT:
231 u8x8_d_helper_display_init(u8x8);
232 u8x8_cad_SendSequence(u8x8, u8x8_d_ssd1317_96x96_init_seq);
233 break;
234 case U8X8_MSG_DISPLAY_SETUP_MEMORY:
235 u8x8_d_helper_display_setup_memory(u8x8, &u8x8_ssd1317_96x96_display_info);
236 break;
237 default:
238 return 0;
239 }
240 return 1;
241 }

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