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comparison: components/u8g2/csrc/u8x8_d_ssd1606_172x72.c

components/u8g2/csrc/u8x8_d_ssd1606_172x72.c

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1 /*
2
3 u8x8_d_ssd1606_172x72.c
4
5 Universal 8bit Graphics Library (https://github.com/olikraus/u8g2/)
6
7 Copyright (c) 2016, olikraus@gmail.com
8 All rights reserved.
9
10 Redistribution and use in source and binary forms, with or without modification,
11 are permitted provided that the following conditions are met:
12
13 * Redistributions of source code must retain the above copyright notice, this list
14 of conditions and the following disclaimer.
15
16 * Redistributions in binary form must reproduce the above copyright notice, this
17 list of conditions and the following disclaimer in the documentation and/or other
18 materials provided with the distribution.
19
20 THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND
21 CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
22 INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
23 MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
24 DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR
25 CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
26 SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
27 NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
28 LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
29 CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
30 STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
31 ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
32 ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
33
34 SSD1606: 128x180x2
35 two-bit, four graylevels
36 command
37 0x22: assign actions
38 0x20: execute actions
39
40 action for command 0x022 are (more or less guessed)
41 bit 7: Enable Clock
42 bit 6: Enable Charge Pump
43 bit 5: Load Temparture Value (???)
44 bit 4: Load LUT (???)
45 bit 3: Initial Display (???)
46 bit 2: Pattern Display --> Requires about 945ms with the LUT from below
47 bit 1: Disable Charge Pump
48 bit 0: Disable Clock
49
50 Disable Charge Pump and Clock require about 267ms
51 Enable Charge Pump and Clock require about 10ms
52
53 Notes:
54 - Introduced a refresh display message, which copies RAM to display
55 - Charge pump and clock are only enabled for the transfer RAM to display
56 - U8x8 will not really work because of the two buffers in the SSD1606, however U8g2 should be ok.
57
58 */
59
60
61 #include "u8x8.h"
62
63
64 #define L(a,b,c,d) (((a)<<6)|((b)<<4)|((c)<<2)|(d))
65
66
67 /* GDE021A1, 2.1" EPD */
68 static const uint8_t u8x8_d_ssd1606_172x72_gde021a1_init_seq[] = {
69
70 U8X8_START_TRANSFER(), /* enable chip, delay is part of the transfer start */
71
72 U8X8_CA(0x10, 0x00), /* Deep Sleep mode Control: Disable */
73 U8X8_CA(0x11, 0x03), /* Define data entry mode, x&y inc, x first */
74 U8X8_CAA(0x44, 0, 31), /* RAM x start & end, each byte has 4 pixel, 32*4=128 */
75 U8X8_CAA(0x45, 0, 179), /* RAM y start & end, 179 MAX */
76
77 U8X8_CA(0x4e, 0), /* set x pos, 0..31 */
78 U8X8_CA(0x4f, 0), /* set y pos, 0...179 */
79
80 U8X8_CA(0xf0, 0x1f), /* set booster feedback to internal */
81 U8X8_CA(0x22, 0xc0), /* display update seq. option: enable clk, enable CP, .... todo: this is never activated */
82
83 U8X8_C(0x32), /* write LUT register*/
84
85 #ifdef ORIGINAL_LUT
86
87 /* wavefrom part of the LUT: absolute LUT... this will always force the destination color */
88 U8X8_A4(0x00,0x00,0x00,0x55), /* step 0 */
89 U8X8_A4(0x00,0x00,0x55,0x55), /* step 1 */
90 U8X8_A4(0x00,0x55,0x55,0x55),
91 U8X8_A4(0xAA,0xAA,0xAA,0xAA),
92 U8X8_A4(0x15,0x15,0x15,0x15),
93 U8X8_A4(0x05,0x05,0x05,0x05),
94 U8X8_A4(0x01,0x01,0x01,0x01),
95 U8X8_A4(0x00,0x00,0x00,0x00),
96 U8X8_A4(0x00,0x00,0x00,0x00),
97 U8X8_A4(0x00,0x00,0x00,0x00),
98 U8X8_A4(0x00,0x00,0x00,0x00),
99 U8X8_A4(0x00,0x00,0x00,0x00),
100 U8X8_A4(0x00,0x00,0x00,0x00),
101 U8X8_A4(0x00,0x00,0x00,0x00),
102 U8X8_A4(0x00,0x00,0x00,0x00),
103 U8X8_A4(0x00,0x00,0x00,0x00),
104 U8X8_A4(0x00,0x00,0x00,0x00),
105 U8X8_A4(0x00,0x00,0x00,0x00),
106 U8X8_A4(0x00,0x00,0x00,0x00),
107 U8X8_A4(0x00,0x00,0x00,0x00), /* step 19 */
108
109 /* timing part of the LUT */
110 U8X8_A8(0x22,0xFB,0x22,0x1B,0x00,0x00,0x00,0x00),
111 U8X8_A(0x00),U8X8_A(0x00),
112
113 #else
114
115 /* the following LUT will not change anything if the old and the new values are the same */
116 /* 03 02 01 00 13 12 11 10 23 22 21 20 33 32 31 30 original */
117 U8X8_A4(L(0, 0, 0, 0), L(0, 0, 0, 0), L(0, 0, 0, 0), L(0, 1, 1, 1)), // 0x00,0x00,0x00,0x55, step 0
118 U8X8_A4(L(0, 0, 0, 0), L(0, 0, 0, 0), L(1, 0, 1, 1), L(0, 1, 1, 1)), // 0x00,0x00,0x55,0x55, step 1
119 U8X8_A4(L(0, 0, 0, 0), L(1, 1, 0, 1), L(1, 0, 1, 1), L(0, 1, 1, 1)), // 0x00,0x55,0x55,0x55, step 2
120 U8X8_A4(L(2, 2, 2, 0), L(2, 2, 0, 2), L(2, 0, 2, 2), L(0, 2, 2, 2)), // 0xAA,0xAA,0xAA,0xAA, step 3
121 U8X8_A4(L(0, 1, 1, 0), L(0, 1, 0, 1), L(0, 0, 1, 1), L(0, 1, 1, 1)), // 0x15,0x15,0x15,0x15, step 4
122 U8X8_A4(L(0, 0, 1, 0), L(0, 0, 0, 1), L(0, 0, 1, 1), L(0, 0, 1, 1)), // 0x05,0x05,0x05,0x05, step 5
123 U8X8_A4(L(0, 0, 0, 0), L(0, 0, 0, 1), L(0, 0, 0, 1), L(0, 0, 0, 1)), // 0x01,0x01,0x01,0x01, step 6
124 U8X8_A4(0x00,0x00,0x00,0x00),
125 U8X8_A4(0x00,0x00,0x00,0x00),
126 U8X8_A4(0x00,0x00,0x00,0x00),
127 U8X8_A4(0x00,0x00,0x00,0x00),
128 U8X8_A4(0x00,0x00,0x00,0x00),
129 U8X8_A4(0x00,0x00,0x00,0x00),
130 U8X8_A4(0x00,0x00,0x00,0x00),
131 U8X8_A4(0x00,0x00,0x00,0x00),
132 U8X8_A4(0x00,0x00,0x00,0x00),
133 U8X8_A4(0x00,0x00,0x00,0x00),
134 U8X8_A4(0x00,0x00,0x00,0x00),
135 U8X8_A4(0x00,0x00,0x00,0x00),
136 U8X8_A4(0x00,0x00,0x00,0x00), /* step 19 */
137
138 /* timing part of the LUT */
139 U8X8_A8(0x22,0xFB,0x22,0x1B,0x00,0x00,0x00,0x00),
140 U8X8_A(0x00),U8X8_A(0x00),
141
142 #endif
143
144 U8X8_CA(0x2c, 0xa0), /* write vcom value*/
145 U8X8_CA(0x3c, 0x63), /* select boarder waveform */
146 U8X8_CA(0x22, 0xc4), /* display update seq. option: clk -> CP -> LUT -> initial display -> pattern display */
147 /* 0x0c4 is mentioned in chapter 9.2 of the GDE021A1 data sheet */
148
149 U8X8_END_TRANSFER(), /* disable chip */
150 U8X8_END() /* end of sequence */
151 };
152
153 static const uint8_t u8x8_d_ssd1606_to_display_seq[] = {
154 U8X8_START_TRANSFER(), /* enable chip, delay is part of the transfer start */
155
156
157 //U8X8_CA(0x22, 0xc0), /* display update seq. option: Enable clock and charge pump */
158 //U8X8_C(0x20), /* execute sequence */
159 //U8X8_DLY(10),
160 /* strange, splitting 0x0c0 does not work reliable */
161
162 U8X8_CA(0x22, 0xc4), /* display update seq. option: clk -> CP -> LUT -> initial display -> pattern display */
163 U8X8_C(0x20), /* execute sequence */
164 U8X8_DLY(250), /* the sequence above requires about 970ms */
165 U8X8_DLY(250),
166 U8X8_DLY(250),
167 U8X8_DLY(230),
168
169 U8X8_CA(0x22, 0x03), /* disable clock and charge pump */
170 U8X8_DLY(200), /* this requres about 270ms */
171 U8X8_DLY(90),
172
173 //U8X8_CA(0x10, 0x01), /* deep sleep mode */
174 //U8X8_C(0x20), /* execute sequence */
175 U8X8_DLY(50),
176
177 U8X8_END_TRANSFER(), /* disable chip */
178 U8X8_END() /* end of sequence */
179 };
180
181
182 // static const uint8_t u8x8_d_ssd1606_172x72_powersave0_seq[] = {
183 // U8X8_START_TRANSFER(), /* enable chip, delay is part of the transfer start */
184 // U8X8_END_TRANSFER(), /* disable chip */
185 // U8X8_END() /* end of sequence */
186 // };
187
188
189 // static const uint8_t u8x8_d_ssd1606_172x72_powersave1_seq[] = {
190 // U8X8_START_TRANSFER(), /* enable chip, delay is part of the transfer start */
191 // U8X8_END_TRANSFER(), /* disable chip */
192 // U8X8_END() /* end of sequence */
193 // };
194
195 // static const uint8_t u8x8_d_ssd1606_172x72_flip0_seq[] = {
196 // U8X8_START_TRANSFER(), /* enable chip, delay is part of the transfer start */
197 // U8X8_END_TRANSFER(), /* disable chip */
198 // U8X8_END() /* end of sequence */
199 // };
200
201 // static const uint8_t u8x8_d_ssd1606_172x72_flip1_seq[] = {
202 // U8X8_START_TRANSFER(), /* enable chip, delay is part of the transfer start */
203 // U8X8_END_TRANSFER(), /* disable chip */
204 // U8X8_END() /* end of sequence */
205 // };
206
207
208 static uint8_t *u8x8_convert_tile_for_ssd1606(uint8_t *t)
209 {
210 uint8_t i;
211 uint16_t r;
212 static uint8_t buf[16];
213 uint8_t *pbuf = buf;
214
215 for( i = 0; i < 8; i++ )
216 {
217 r = u8x8_upscale_byte(~(*t++));
218 *pbuf++ = (r>>8) & 255;
219 *pbuf++ = r & 255;
220 }
221 return buf;
222 }
223
224 static void u8x8_d_ssd1606_draw_tile(u8x8_t *u8x8, uint8_t arg_int, void *arg_ptr) U8X8_NOINLINE;
225 static void u8x8_d_ssd1606_draw_tile(u8x8_t *u8x8, uint8_t arg_int, void *arg_ptr)
226 {
227 uint8_t x, c, page;
228 uint8_t *ptr;
229 u8x8_cad_StartTransfer(u8x8);
230
231 page = u8x8->display_info->tile_height;
232 page --;
233 page -= (((u8x8_tile_t *)arg_ptr)->y_pos);
234 page *= 2;
235
236
237 x = ((u8x8_tile_t *)arg_ptr)->x_pos;
238 x *= 8;
239 x += u8x8->x_offset;
240
241 u8x8_cad_SendCmd(u8x8, 0x00f ); /* scan start */
242 u8x8_cad_SendArg(u8x8, 0);
243
244 u8x8_cad_SendCmd(u8x8, 0x011 ); /* cursor increment mode */
245 u8x8_cad_SendArg(u8x8, 3);
246
247 u8x8_cad_SendCmd(u8x8, 0x045 ); /* window start column */
248 u8x8_cad_SendArg(u8x8, 0);
249 u8x8_cad_SendArg(u8x8, 179); /* end of display */
250
251 u8x8_cad_SendCmd(u8x8, 0x044 ); /* window end page */
252 u8x8_cad_SendArg(u8x8, page);
253 u8x8_cad_SendArg(u8x8, page+1);
254
255 u8x8_cad_SendCmd(u8x8, 0x04f ); /* window column */
256 u8x8_cad_SendArg(u8x8, x);
257
258 u8x8_cad_SendCmd(u8x8, 0x04e ); /* window row */
259 u8x8_cad_SendArg(u8x8, page);
260
261 u8x8_cad_SendCmd(u8x8, 0x024 );
262
263 do
264 {
265 c = ((u8x8_tile_t *)arg_ptr)->cnt;
266 ptr = ((u8x8_tile_t *)arg_ptr)->tile_ptr;
267 do
268 {
269 u8x8_cad_SendData(u8x8, 16, u8x8_convert_tile_for_ssd1606(ptr));
270 ptr += 8;
271 x += 8;
272 c--;
273 } while( c > 0 );
274
275 arg_int--;
276 } while( arg_int > 0 );
277
278 u8x8_cad_EndTransfer(u8x8);
279 }
280
281
282 static uint8_t u8x8_d_ssd1606_172x72_generic(u8x8_t *u8x8, uint8_t msg, uint8_t arg_int, void *arg_ptr)
283 {
284 switch(msg)
285 {
286 /* handled by the calling function
287 case U8X8_MSG_DISPLAY_SETUP_MEMORY:
288 u8x8_d_helper_display_setup_memory(u8x8, &u8x8_ssd1606_172x72_display_info);
289 break;
290 */
291 case U8X8_MSG_DISPLAY_INIT:
292
293 u8x8_d_helper_display_init(u8x8);
294 u8x8_cad_SendSequence(u8x8, u8x8_d_ssd1606_172x72_gde021a1_init_seq);
295
296 /* special code for the SSD1606... */
297 /* ensure that the initial buffer is clear and all eInk is set to white */
298 /* this is done here, because the LUT will be of that kind, that it uses the previous color */
299 /* make everything black */
300 u8x8_FillDisplay(u8x8);
301 /* write content to the display */
302 u8x8_RefreshDisplay(u8x8);
303 /* now make everything clear */
304 u8x8_FillDisplay(u8x8);
305 /* write content to the display */
306 u8x8_RefreshDisplay(u8x8);
307 /* now make everything clear */
308 u8x8_ClearDisplay(u8x8);
309 /* write content to the display */
310 u8x8_RefreshDisplay(u8x8);
311
312 u8x8_ClearDisplay(u8x8);
313 /* write content to the display */
314 u8x8_RefreshDisplay(u8x8);
315
316 break;
317 case U8X8_MSG_DISPLAY_SET_POWER_SAVE:
318 /*
319 if ( arg_int == 0 )
320 u8x8_cad_SendSequence(u8x8, u8x8_d_ssd1606_172x72_powersave0_seq);
321 else
322 u8x8_cad_SendSequence(u8x8, u8x8_d_ssd1606_172x72_powersave1_seq);
323 */
324 break;
325 case U8X8_MSG_DISPLAY_SET_FLIP_MODE:
326 /*
327 if ( arg_int == 0 )
328 {
329 u8x8_cad_SendSequence(u8x8, u8x8_d_ssd1606_172x72_flip0_seq);
330 u8x8->x_offset = u8x8->display_info->default_x_offset;
331 }
332 else
333 {
334 u8x8_cad_SendSequence(u8x8, u8x8_d_ssd1606_172x72_flip1_seq);
335 u8x8->x_offset = u8x8->display_info->flipmode_x_offset;
336 }
337 */
338 break;
339 #ifdef U8X8_WITH_SET_CONTRAST
340 case U8X8_MSG_DISPLAY_SET_CONTRAST:
341 /*
342 u8x8_cad_StartTransfer(u8x8);
343 u8x8_cad_EndTransfer(u8x8);
344 */
345 break;
346 #endif
347 case U8X8_MSG_DISPLAY_DRAW_TILE:
348 u8x8_d_ssd1606_draw_tile(u8x8, arg_int, arg_ptr);
349 break;
350 case U8X8_MSG_DISPLAY_REFRESH:
351 u8x8_cad_SendSequence(u8x8, u8x8_d_ssd1606_to_display_seq);
352 break;
353 default:
354 return 0;
355 }
356 return 1;
357 }
358
359
360 static const u8x8_display_info_t u8x8_ssd1606_172x72_display_info =
361 {
362 /* chip_enable_level = */ 0,
363 /* chip_disable_level = */ 1,
364
365 /* post_chip_enable_wait_ns = */ 120,
366 /* pre_chip_disable_wait_ns = */ 60,
367 /* reset_pulse_width_ms = */ 100,
368 /* post_reset_wait_ms = */ 100,
369 /* sda_setup_time_ns = */ 50, /* SSD1606: */
370 /* sck_pulse_width_ns = */ 100, /* SSD1606: 100ns */
371 /* sck_clock_hz = */ 4000000UL, /* since Arduino 1.6.0, the SPI bus speed in Hz. Should be 1000000000/sck_pulse_width_ns */
372 /* spi_mode = */ 0, /* active high, rising edge */
373 /* i2c_bus_clock_100kHz = */ 4,
374 /* data_setup_time_ns = */ 40,
375 /* write_pulse_width_ns = */ 150,
376 /* tile_width = */ 22, /* 22*8 = 176 */
377 /* tile_hight = */ 9, /* 9*8 = 72 */
378 /* default_x_offset = */ 0,
379 /* flipmode_x_offset = */ 0,
380 /* pixel_width = */ 172,
381 /* pixel_height = */ 72
382 };
383
384 uint8_t u8x8_d_ssd1606_172x72(u8x8_t *u8x8, uint8_t msg, uint8_t arg_int, void *arg_ptr)
385 {
386 if ( msg == U8X8_MSG_DISPLAY_SETUP_MEMORY )
387 {
388 u8x8_d_helper_display_setup_memory(u8x8, &u8x8_ssd1606_172x72_display_info);
389 return 1;
390 }
391 return u8x8_d_ssd1606_172x72_generic(u8x8, msg, arg_int, arg_ptr);
392 }
393
394

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