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1 /* |
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2 |
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3 u8x8_d_st7567.c |
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4 |
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5 Universal 8bit Graphics Library (https://github.com/olikraus/u8g2/) |
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6 |
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7 Copyright (c) 2016, olikraus@gmail.com |
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8 All rights reserved. |
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9 |
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10 Redistribution and use in source and binary forms, with or without modification, |
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11 are permitted provided that the following conditions are met: |
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12 |
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13 * Redistributions of source code must retain the above copyright notice, this list |
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14 of conditions and the following disclaimer. |
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15 |
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16 * Redistributions in binary form must reproduce the above copyright notice, this |
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17 list of conditions and the following disclaimer in the documentation and/or other |
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18 materials provided with the distribution. |
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19 |
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20 THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND |
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21 CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, |
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22 INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF |
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23 MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE |
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24 DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR |
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25 CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, |
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26 SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
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27 NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; |
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28 LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER |
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29 CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, |
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30 STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) |
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31 ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF |
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32 ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
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33 |
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34 |
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35 */ |
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36 #include "u8x8.h" |
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37 |
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38 |
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39 |
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40 |
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41 static const uint8_t u8x8_d_st7567_132x64_powersave0_seq[] = { |
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42 U8X8_START_TRANSFER(), /* enable chip, delay is part of the transfer start */ |
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43 U8X8_C(0x0a4), /* all pixel off, issue 142 */ |
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44 U8X8_C(0x0af), /* display on */ |
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45 U8X8_END_TRANSFER(), /* disable chip */ |
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46 U8X8_END() /* end of sequence */ |
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47 }; |
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48 |
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49 static const uint8_t u8x8_d_st7567_132x64_powersave1_seq[] = { |
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50 U8X8_START_TRANSFER(), /* enable chip, delay is part of the transfer start */ |
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51 U8X8_C(0x0ae), /* display off */ |
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52 U8X8_C(0x0a5), /* enter powersafe: all pixel on, issue 142 */ |
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53 U8X8_END_TRANSFER(), /* disable chip */ |
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54 U8X8_END() /* end of sequence */ |
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55 }; |
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56 |
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57 static const uint8_t u8x8_d_st7567_132x64_flip0_seq[] = { |
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58 U8X8_START_TRANSFER(), /* enable chip, delay is part of the transfer start */ |
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59 U8X8_C(0x0a1), /* segment remap a0/a1*/ |
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60 U8X8_C(0x0c0), /* c0: scan dir normal, c8: reverse */ |
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61 U8X8_END_TRANSFER(), /* disable chip */ |
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62 U8X8_END() /* end of sequence */ |
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63 }; |
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64 |
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65 static const uint8_t u8x8_d_st7567_132x64_flip1_seq[] = { |
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66 U8X8_START_TRANSFER(), /* enable chip, delay is part of the transfer start */ |
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67 U8X8_C(0x0a0), /* segment remap a0/a1*/ |
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68 U8X8_C(0x0c8), /* c0: scan dir normal, c8: reverse */ |
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69 U8X8_END_TRANSFER(), /* disable chip */ |
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70 U8X8_END() /* end of sequence */ |
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71 }; |
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72 |
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73 static const uint8_t u8x8_d_st7567_n_flip0_seq[] = { |
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74 U8X8_START_TRANSFER(), /* enable chip, delay is part of the transfer start */ |
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75 U8X8_C(0x0a0), /* segment remap a0/a1*/ |
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76 U8X8_C(0x0c0), /* c0: scan dir normal, c8: reverse */ |
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77 U8X8_END_TRANSFER(), /* disable chip */ |
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78 U8X8_END() /* end of sequence */ |
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79 }; |
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80 |
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81 static const uint8_t u8x8_d_st7567_n_flip1_seq[] = { |
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82 U8X8_START_TRANSFER(), /* enable chip, delay is part of the transfer start */ |
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83 U8X8_C(0x0a1), /* segment remap a0/a1*/ |
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84 U8X8_C(0x0c8), /* c0: scan dir normal, c8: reverse */ |
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85 U8X8_END_TRANSFER(), /* disable chip */ |
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86 U8X8_END() /* end of sequence */ |
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87 }; |
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88 |
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89 |
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90 |
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91 /*=====================================================*/ |
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92 |
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93 |
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94 static const u8x8_display_info_t u8x8_st7567_132x64_display_info = |
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95 { |
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96 /* chip_enable_level = */ 0, |
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97 /* chip_disable_level = */ 1, |
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98 |
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99 /* post_chip_enable_wait_ns = */ 150, /* */ |
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100 /* pre_chip_disable_wait_ns = */ 50, /* */ |
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101 /* reset_pulse_width_ms = */ 1, |
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102 /* post_reset_wait_ms = */ 1, |
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103 /* sda_setup_time_ns = */ 50, /* */ |
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104 /* sck_pulse_width_ns = */ 120, /* */ |
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105 /* sck_clock_hz = */ 4000000UL, /* */ |
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106 /* spi_mode = */ 0, /* active high, rising edge */ |
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107 /* i2c_bus_clock_100kHz = */ 4, |
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108 /* data_setup_time_ns = */ 40, /* */ |
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109 /* write_pulse_width_ns = */ 80, /* */ |
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110 /* tile_width = */ 17, /* width of 17*8=136 pixel */ |
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111 /* tile_hight = */ 8, |
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112 /* default_x_offset = */ 0, |
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113 /* flipmode_x_offset = */ 0, |
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114 /* pixel_width = */ 132, |
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115 /* pixel_height = */ 64 |
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116 }; |
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117 |
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118 static const uint8_t u8x8_d_st7567_132x64_init_seq[] = { |
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119 |
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120 U8X8_START_TRANSFER(), /* enable chip, delay is part of the transfer start */ |
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121 |
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122 U8X8_C(0x0e2), /* soft reset */ |
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123 U8X8_C(0x0ae), /* display off */ |
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124 U8X8_C(0x040), /* set display start line to 0 */ |
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125 |
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126 U8X8_C(0x0a1), /* ADC set to reverse */ |
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127 U8X8_C(0x0c0), /* common output mode */ |
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128 // Flipmode |
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129 //U8X8_C(0x0a0), /* ADC set to reverse */ |
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130 //U8X8_C(0x0c8), /* common output mode */ |
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131 |
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132 U8X8_C(0x0a6), /* display normal, bit val 0: LCD pixel off. */ |
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133 U8X8_C(0x0a3), /* LCD bias 1/7 */ |
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134 /* power on sequence from paxinstruments */ |
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135 U8X8_C(0x028|4), /* all power control circuits on */ |
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136 U8X8_DLY(50), |
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137 U8X8_C(0x028|6), /* all power control circuits on */ |
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138 U8X8_DLY(50), |
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139 U8X8_C(0x028|7), /* all power control circuits on */ |
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140 U8X8_DLY(50), |
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141 |
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142 U8X8_C(0x026), /* v0 voltage resistor ratio */ |
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143 U8X8_CA(0x081, 0x027), /* set contrast, contrast value*/ |
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144 |
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145 U8X8_C(0x0ae), /* display off */ |
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146 U8X8_C(0x0a5), /* enter powersafe: all pixel on, issue 142 */ |
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147 |
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148 U8X8_END_TRANSFER(), /* disable chip */ |
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149 U8X8_END() /* end of sequence */ |
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150 }; |
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151 |
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152 /* pax instruments 132x64 display */ |
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153 uint8_t u8x8_d_st7567_pi_132x64(u8x8_t *u8x8, uint8_t msg, uint8_t arg_int, void *arg_ptr) |
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154 { |
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155 uint8_t x, c; |
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156 uint8_t *ptr; |
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157 switch(msg) |
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158 { |
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159 case U8X8_MSG_DISPLAY_SETUP_MEMORY: |
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160 u8x8_d_helper_display_setup_memory(u8x8, &u8x8_st7567_132x64_display_info); |
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161 break; |
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162 case U8X8_MSG_DISPLAY_INIT: |
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163 u8x8_d_helper_display_init(u8x8); |
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164 u8x8_cad_SendSequence(u8x8, u8x8_d_st7567_132x64_init_seq); |
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165 break; |
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166 case U8X8_MSG_DISPLAY_SET_POWER_SAVE: |
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167 if ( arg_int == 0 ) |
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168 u8x8_cad_SendSequence(u8x8, u8x8_d_st7567_132x64_powersave0_seq); |
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169 else |
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170 u8x8_cad_SendSequence(u8x8, u8x8_d_st7567_132x64_powersave1_seq); |
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171 break; |
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172 case U8X8_MSG_DISPLAY_SET_FLIP_MODE: |
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173 if ( arg_int == 0 ) |
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174 { |
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175 u8x8_cad_SendSequence(u8x8, u8x8_d_st7567_132x64_flip0_seq); |
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176 u8x8->x_offset = u8x8->display_info->default_x_offset; |
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177 } |
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178 else |
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179 { |
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180 u8x8_cad_SendSequence(u8x8, u8x8_d_st7567_132x64_flip1_seq); |
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181 u8x8->x_offset = u8x8->display_info->flipmode_x_offset; |
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182 } |
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183 break; |
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184 #ifdef U8X8_WITH_SET_CONTRAST |
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185 case U8X8_MSG_DISPLAY_SET_CONTRAST: |
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186 u8x8_cad_StartTransfer(u8x8); |
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187 u8x8_cad_SendCmd(u8x8, 0x081 ); |
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188 u8x8_cad_SendArg(u8x8, arg_int >> 2 ); /* st7567 has range from 0 to 63 */ |
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189 u8x8_cad_EndTransfer(u8x8); |
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190 break; |
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191 #endif |
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192 case U8X8_MSG_DISPLAY_DRAW_TILE: |
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193 u8x8_cad_StartTransfer(u8x8); |
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194 |
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195 x = ((u8x8_tile_t *)arg_ptr)->x_pos; |
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196 x *= 8; |
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197 x += u8x8->x_offset; |
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198 u8x8_cad_SendCmd(u8x8, 0x010 | (x>>4) ); |
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199 u8x8_cad_SendCmd(u8x8, 0x000 | ((x&15))); |
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200 u8x8_cad_SendCmd(u8x8, 0x0b0 | (((u8x8_tile_t *)arg_ptr)->y_pos)); |
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201 |
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202 c = ((u8x8_tile_t *)arg_ptr)->cnt; |
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203 c *= 8; |
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204 ptr = ((u8x8_tile_t *)arg_ptr)->tile_ptr; |
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205 /* |
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206 The following if condition checks the hardware limits of the st7567 |
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207 controller: It is not allowed to write beyond the display limits. |
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208 This is in fact an issue within flip mode. |
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209 */ |
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210 if ( c + x > 132u ) |
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211 { |
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212 c = 132u; |
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213 c -= x; |
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214 } |
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215 do |
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216 { |
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217 u8x8_cad_SendData(u8x8, c, ptr); /* note: SendData can not handle more than 255 bytes */ |
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218 arg_int--; |
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219 } while( arg_int > 0 ); |
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220 |
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221 u8x8_cad_EndTransfer(u8x8); |
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222 break; |
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223 default: |
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224 return 0; |
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225 } |
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226 return 1; |
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227 } |
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228 |
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229 |
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230 |
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231 |
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232 /*=====================================================*/ |
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233 |
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234 |
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235 |
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236 |
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237 |
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238 static const u8x8_display_info_t u8x8_st7567_jlx12864_display_info = |
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239 { |
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240 /* chip_enable_level = */ 0, |
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241 /* chip_disable_level = */ 1, |
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242 |
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243 /* post_chip_enable_wait_ns = */ 150, /* */ |
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244 /* pre_chip_disable_wait_ns = */ 50, /* */ |
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245 /* reset_pulse_width_ms = */ 1, |
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246 /* post_reset_wait_ms = */ 1, |
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247 /* sda_setup_time_ns = */ 50, /* */ |
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248 /* sck_pulse_width_ns = */ 120, /* */ |
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249 /* sck_clock_hz = */ 4000000UL, /* */ |
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250 /* spi_mode = */ 0, /* active high, rising edge */ |
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251 /* i2c_bus_clock_100kHz = */ 4, |
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252 /* data_setup_time_ns = */ 40, /* */ |
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253 /* write_pulse_width_ns = */ 80, /* */ |
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254 /* tile_width = */ 16, /* width of 16*8=128 pixel */ |
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255 /* tile_hight = */ 8, |
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256 /* default_x_offset = */ 4, |
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257 /* flipmode_x_offset = */ 0, |
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258 /* pixel_width = */ 128, |
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259 /* pixel_height = */ 64 |
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260 }; |
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261 |
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262 static const uint8_t u8x8_st7567_jlx12864_init_seq[] = { |
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263 |
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264 U8X8_START_TRANSFER(), /* enable chip, delay is part of the transfer start */ |
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265 |
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266 U8X8_C(0x0e2), /* soft reset */ |
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267 U8X8_C(0x0ae), /* display off */ |
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268 U8X8_C(0x040), /* set display start line to 0 */ |
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269 |
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270 U8X8_C(0x0a1), /* ADC set to reverse */ |
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271 U8X8_C(0x0c0), /* common output mode */ |
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272 // Flipmode |
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273 //U8X8_C(0x0a0), /* ADC set to reverse */ |
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274 //U8X8_C(0x0c8), /* common output mode */ |
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275 |
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276 U8X8_C(0x0a6), /* display normal, bit val 0: LCD pixel off. */ |
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277 U8X8_C(0x0a3), /* LCD bias 1/7 */ |
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278 /* power on sequence from paxinstruments */ |
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279 U8X8_C(0x028|4), /* all power control circuits on */ |
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280 U8X8_DLY(50), |
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281 U8X8_C(0x028|6), /* all power control circuits on */ |
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282 U8X8_DLY(50), |
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283 U8X8_C(0x028|7), /* all power control circuits on */ |
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284 U8X8_DLY(50), |
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285 |
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286 U8X8_C(0x023), /* v0 voltage resistor ratio */ |
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287 U8X8_CA(0x081, 42>>2), /* set contrast, contrast value*/ |
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288 |
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289 U8X8_C(0x0ae), /* display off */ |
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290 U8X8_C(0x0a5), /* enter powersafe: all pixel on, issue 142 */ |
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291 |
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292 U8X8_END_TRANSFER(), /* disable chip */ |
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293 U8X8_END() /* end of sequence */ |
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294 }; |
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295 |
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296 /* JLX12864 display */ |
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297 uint8_t u8x8_d_st7567_jlx12864(u8x8_t *u8x8, uint8_t msg, uint8_t arg_int, void *arg_ptr) |
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298 { |
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299 uint8_t x, c; |
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300 uint8_t *ptr; |
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301 switch(msg) |
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302 { |
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303 case U8X8_MSG_DISPLAY_SETUP_MEMORY: |
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304 u8x8_d_helper_display_setup_memory(u8x8, &u8x8_st7567_jlx12864_display_info); |
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305 break; |
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306 case U8X8_MSG_DISPLAY_INIT: |
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307 u8x8_d_helper_display_init(u8x8); |
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308 u8x8_cad_SendSequence(u8x8, u8x8_st7567_jlx12864_init_seq); |
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309 break; |
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310 case U8X8_MSG_DISPLAY_SET_POWER_SAVE: |
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311 if ( arg_int == 0 ) |
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312 u8x8_cad_SendSequence(u8x8, u8x8_d_st7567_132x64_powersave0_seq); |
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313 else |
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314 u8x8_cad_SendSequence(u8x8, u8x8_d_st7567_132x64_powersave1_seq); |
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315 break; |
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316 case U8X8_MSG_DISPLAY_SET_FLIP_MODE: |
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317 if ( arg_int == 0 ) |
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318 { |
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319 u8x8_cad_SendSequence(u8x8, u8x8_d_st7567_132x64_flip0_seq); |
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320 u8x8->x_offset = u8x8->display_info->default_x_offset; |
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321 } |
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322 else |
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323 { |
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324 u8x8_cad_SendSequence(u8x8, u8x8_d_st7567_132x64_flip1_seq); |
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325 u8x8->x_offset = u8x8->display_info->flipmode_x_offset; |
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326 } |
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327 break; |
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328 #ifdef U8X8_WITH_SET_CONTRAST |
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329 case U8X8_MSG_DISPLAY_SET_CONTRAST: |
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330 u8x8_cad_StartTransfer(u8x8); |
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331 u8x8_cad_SendCmd(u8x8, 0x081 ); |
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332 u8x8_cad_SendArg(u8x8, arg_int >> 2 ); /* st7567 has range from 0 to 63 */ |
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333 u8x8_cad_EndTransfer(u8x8); |
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334 break; |
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335 #endif |
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336 case U8X8_MSG_DISPLAY_DRAW_TILE: |
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337 u8x8_cad_StartTransfer(u8x8); |
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338 |
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339 x = ((u8x8_tile_t *)arg_ptr)->x_pos; |
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340 x *= 8; |
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341 x += u8x8->x_offset; |
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342 u8x8_cad_SendCmd(u8x8, 0x010 | (x>>4) ); |
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343 u8x8_cad_SendCmd(u8x8, 0x000 | ((x&15))); |
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344 u8x8_cad_SendCmd(u8x8, 0x0b0 | (((u8x8_tile_t *)arg_ptr)->y_pos)); |
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345 |
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346 c = ((u8x8_tile_t *)arg_ptr)->cnt; |
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347 c *= 8; |
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348 ptr = ((u8x8_tile_t *)arg_ptr)->tile_ptr; |
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349 /* |
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350 The following if condition checks the hardware limits of the st7567 |
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351 controller: It is not allowed to write beyond the display limits. |
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352 This is in fact an issue within flip mode. |
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353 */ |
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354 if ( c + x > 132u ) |
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355 { |
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356 c = 132u; |
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357 c -= x; |
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358 } |
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359 do |
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360 { |
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361 u8x8_cad_SendData(u8x8, c, ptr); /* note: SendData can not handle more than 255 bytes */ |
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362 arg_int--; |
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363 } while( arg_int > 0 ); |
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364 |
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365 u8x8_cad_EndTransfer(u8x8); |
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366 break; |
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367 default: |
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368 return 0; |
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369 } |
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370 return 1; |
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371 } |
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372 |
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373 |
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374 /*=====================================================*/ |
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375 |
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376 |
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377 |
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378 static const u8x8_display_info_t u8x8_st7567_enh_dg128064_display_info = |
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379 { |
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380 /* chip_enable_level = */ 0, |
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381 /* chip_disable_level = */ 1, |
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382 |
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383 /* post_chip_enable_wait_ns = */ 150, /* */ |
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384 /* pre_chip_disable_wait_ns = */ 50, /* */ |
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385 /* reset_pulse_width_ms = */ 1, |
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386 /* post_reset_wait_ms = */ 1, |
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387 /* sda_setup_time_ns = */ 50, /* */ |
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388 /* sck_pulse_width_ns = */ 120, /* */ |
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389 /* sck_clock_hz = */ 4000000UL, /* */ |
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390 /* spi_mode = */ 0, /* active high, rising edge */ |
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391 /* i2c_bus_clock_100kHz = */ 4, |
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392 /* data_setup_time_ns = */ 40, /* */ |
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393 /* write_pulse_width_ns = */ 80, /* */ |
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394 /* tile_width = */ 16, /* width of 16*8=128 pixel */ |
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395 /* tile_hight = */ 8, |
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396 /* default_x_offset = */ 0, |
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397 /* flipmode_x_offset = */ 4, |
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398 /* pixel_width = */ 128, |
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399 /* pixel_height = */ 64 |
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400 }; |
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401 |
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402 static const u8x8_display_info_t u8x8_st7567_enh_dg128064i_display_info = |
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403 { |
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404 /* chip_enable_level = */ 0, |
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405 /* chip_disable_level = */ 1, |
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406 |
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407 /* post_chip_enable_wait_ns = */ 150, /* */ |
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408 /* pre_chip_disable_wait_ns = */ 50, /* */ |
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409 /* reset_pulse_width_ms = */ 1, |
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410 /* post_reset_wait_ms = */ 1, |
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411 /* sda_setup_time_ns = */ 50, /* */ |
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412 /* sck_pulse_width_ns = */ 120, /* */ |
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413 /* sck_clock_hz = */ 4000000UL, /* */ |
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414 /* spi_mode = */ 0, /* active high, rising edge */ |
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415 /* i2c_bus_clock_100kHz = */ 4, |
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416 /* data_setup_time_ns = */ 40, /* */ |
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417 /* write_pulse_width_ns = */ 80, /* */ |
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418 /* tile_width = */ 16, /* width of 16*8=128 pixel */ |
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419 /* tile_hight = */ 8, |
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420 /* default_x_offset = */ 4, |
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421 /* flipmode_x_offset = */ 0, |
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422 /* pixel_width = */ 128, |
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423 /* pixel_height = */ 64 |
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424 }; |
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425 |
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426 static const uint8_t u8x8_st7567_enh_dg128064_init_seq[] = { |
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427 |
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428 U8X8_START_TRANSFER(), /* enable chip, delay is part of the transfer start */ |
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429 |
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430 U8X8_C(0x0e2), /* soft reset */ |
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431 U8X8_C(0x0ae), /* display off */ |
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432 U8X8_C(0x040), /* set display start line to 0 */ |
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433 |
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434 U8X8_C(0x0a1), /* ADC set to reverse */ |
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435 U8X8_C(0x0c0), /* common output mode */ |
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436 // Flipmode |
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437 //U8X8_C(0x0a0), /* ADC set to reverse */ |
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438 //U8X8_C(0x0c8), /* common output mode */ |
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439 |
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440 U8X8_C(0x0a6), /* display normal, bit val 0: LCD pixel off. */ |
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441 U8X8_C(0x0a2), /* LCD bias 1/9 */ |
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442 /* power on sequence from paxinstruments */ |
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443 U8X8_C(0x028|4), /* all power control circuits on */ |
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444 U8X8_DLY(50), |
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445 U8X8_C(0x028|6), /* all power control circuits on */ |
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446 U8X8_DLY(50), |
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447 U8X8_C(0x028|7), /* all power control circuits on */ |
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448 U8X8_DLY(50), |
|
449 |
|
450 U8X8_C(0x023), /* v0 voltage resistor ratio */ |
|
451 U8X8_CA(0x081, 200>>2), /* set contrast, contrast value*/ |
|
452 |
|
453 U8X8_C(0x0ae), /* display off */ |
|
454 U8X8_C(0x0a5), /* enter powersafe: all pixel on, issue 142 */ |
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455 |
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456 U8X8_END_TRANSFER(), /* disable chip */ |
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457 U8X8_END() /* end of sequence */ |
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458 }; |
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459 |
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460 /* ENH-DG128064 transparent display */ |
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461 static uint8_t u8x8_d_st7567_enh_dg128064_generic(u8x8_t *u8x8, uint8_t msg, uint8_t arg_int, void *arg_ptr) |
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462 { |
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463 uint8_t x, c; |
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464 uint8_t *ptr; |
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465 switch(msg) |
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466 { |
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467 case U8X8_MSG_DISPLAY_SETUP_MEMORY: |
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468 u8x8_d_helper_display_setup_memory(u8x8, &u8x8_st7567_enh_dg128064_display_info); |
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469 break; |
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470 case U8X8_MSG_DISPLAY_INIT: |
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471 u8x8_d_helper_display_init(u8x8); |
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472 u8x8_cad_SendSequence(u8x8, u8x8_st7567_enh_dg128064_init_seq); |
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473 break; |
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474 case U8X8_MSG_DISPLAY_SET_POWER_SAVE: |
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475 if ( arg_int == 0 ) |
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476 u8x8_cad_SendSequence(u8x8, u8x8_d_st7567_132x64_powersave0_seq); |
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477 else |
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478 u8x8_cad_SendSequence(u8x8, u8x8_d_st7567_132x64_powersave1_seq); |
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479 break; |
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480 #ifdef U8X8_WITH_SET_CONTRAST |
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481 case U8X8_MSG_DISPLAY_SET_CONTRAST: |
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482 u8x8_cad_StartTransfer(u8x8); |
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483 u8x8_cad_SendCmd(u8x8, 0x081 ); |
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484 u8x8_cad_SendArg(u8x8, arg_int >> 2 ); /* st7567 has range from 0 to 63 */ |
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485 u8x8_cad_EndTransfer(u8x8); |
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486 break; |
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487 #endif |
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488 case U8X8_MSG_DISPLAY_DRAW_TILE: |
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489 u8x8_cad_StartTransfer(u8x8); |
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490 |
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491 x = ((u8x8_tile_t *)arg_ptr)->x_pos; |
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492 x *= 8; |
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493 x += u8x8->x_offset; |
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494 u8x8_cad_SendCmd(u8x8, 0x010 | (x>>4) ); |
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495 u8x8_cad_SendCmd(u8x8, 0x000 | ((x&15))); |
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496 u8x8_cad_SendCmd(u8x8, 0x0b0 | (((u8x8_tile_t *)arg_ptr)->y_pos)); |
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497 |
|
498 c = ((u8x8_tile_t *)arg_ptr)->cnt; |
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499 c *= 8; |
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500 ptr = ((u8x8_tile_t *)arg_ptr)->tile_ptr; |
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501 /* |
|
502 The following if condition checks the hardware limits of the st7567 |
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503 controller: It is not allowed to write beyond the display limits. |
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504 This is in fact an issue within flip mode. |
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505 */ |
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506 if ( c + x > 132u ) |
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507 { |
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508 c = 132u; |
|
509 c -= x; |
|
510 } |
|
511 do |
|
512 { |
|
513 u8x8_cad_SendData(u8x8, c, ptr); /* note: SendData can not handle more than 255 bytes */ |
|
514 arg_int--; |
|
515 } while( arg_int > 0 ); |
|
516 |
|
517 u8x8_cad_EndTransfer(u8x8); |
|
518 break; |
|
519 default: |
|
520 return 0; |
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521 } |
|
522 return 1; |
|
523 } |
|
524 |
|
525 uint8_t u8x8_d_st7567_enh_dg128064(u8x8_t *u8x8, uint8_t msg, uint8_t arg_int, void *arg_ptr) |
|
526 { |
|
527 switch(msg) |
|
528 { |
|
529 case U8X8_MSG_DISPLAY_SETUP_MEMORY: |
|
530 u8x8_d_helper_display_setup_memory(u8x8, &u8x8_st7567_enh_dg128064_display_info); |
|
531 break; |
|
532 case U8X8_MSG_DISPLAY_SET_FLIP_MODE: |
|
533 if ( arg_int == 0 ) |
|
534 { |
|
535 u8x8_cad_SendSequence(u8x8, u8x8_d_st7567_n_flip0_seq); |
|
536 u8x8->x_offset = u8x8->display_info->default_x_offset; |
|
537 } |
|
538 else |
|
539 { |
|
540 u8x8_cad_SendSequence(u8x8, u8x8_d_st7567_n_flip1_seq); |
|
541 u8x8->x_offset = u8x8->display_info->flipmode_x_offset; |
|
542 } |
|
543 break; |
|
544 default: |
|
545 return u8x8_d_st7567_enh_dg128064_generic(u8x8, msg, arg_int, arg_ptr); |
|
546 } |
|
547 return 1; |
|
548 } |
|
549 |
|
550 uint8_t u8x8_d_st7567_enh_dg128064i(u8x8_t *u8x8, uint8_t msg, uint8_t arg_int, void *arg_ptr) |
|
551 { |
|
552 switch(msg) |
|
553 { |
|
554 case U8X8_MSG_DISPLAY_SETUP_MEMORY: |
|
555 u8x8_d_helper_display_setup_memory(u8x8, &u8x8_st7567_enh_dg128064i_display_info); |
|
556 break; |
|
557 case U8X8_MSG_DISPLAY_SET_FLIP_MODE: |
|
558 if ( arg_int == 0 ) |
|
559 { |
|
560 u8x8_cad_SendSequence(u8x8, u8x8_d_st7567_132x64_flip0_seq); |
|
561 u8x8->x_offset = u8x8->display_info->default_x_offset; |
|
562 } |
|
563 else |
|
564 { |
|
565 u8x8_cad_SendSequence(u8x8, u8x8_d_st7567_132x64_flip1_seq); |
|
566 u8x8->x_offset = u8x8->display_info->flipmode_x_offset; |
|
567 } |
|
568 break; |
|
569 default: |
|
570 return u8x8_d_st7567_enh_dg128064_generic(u8x8, msg, arg_int, arg_ptr); |
|
571 } |
|
572 return 1; |
|
573 } |
|
574 |
|
575 |
|
576 /*=====================================================*/ |
|
577 /* issue 657 */ |
|
578 |
|
579 static const u8x8_display_info_t u8x8_st7567_64x32_display_info = |
|
580 { |
|
581 /* chip_enable_level = */ 0, |
|
582 /* chip_disable_level = */ 1, |
|
583 |
|
584 /* post_chip_enable_wait_ns = */ 150, /* */ |
|
585 /* pre_chip_disable_wait_ns = */ 50, /* */ |
|
586 /* reset_pulse_width_ms = */ 1, |
|
587 /* post_reset_wait_ms = */ 1, |
|
588 /* sda_setup_time_ns = */ 50, /* */ |
|
589 /* sck_pulse_width_ns = */ 120, /* */ |
|
590 /* sck_clock_hz = */ 4000000UL, /* */ |
|
591 /* spi_mode = */ 0, /* active high, rising edge */ |
|
592 /* i2c_bus_clock_100kHz = */ 4, |
|
593 /* data_setup_time_ns = */ 40, /* */ |
|
594 /* write_pulse_width_ns = */ 80, /* */ |
|
595 /* tile_width = */ 8, |
|
596 /* tile_hight = */ 4, |
|
597 /* default_x_offset = */ 32, |
|
598 /* flipmode_x_offset = */ 32, |
|
599 /* pixel_width = */ 64, |
|
600 /* pixel_height = */ 32 |
|
601 }; |
|
602 |
|
603 static const uint8_t u8x8_st7567_64x32_init_seq[] = { |
|
604 |
|
605 U8X8_START_TRANSFER(), /* enable chip, delay is part of the transfer start */ |
|
606 |
|
607 U8X8_C(0x0e2), /* soft reset */ |
|
608 U8X8_C(0x0ae), /* display off */ |
|
609 U8X8_C(0x040), /* set display start line to 0 */ |
|
610 |
|
611 U8X8_C(0x0a1), /* ADC */ |
|
612 U8X8_C(0x0c0), /* common output mode */ |
|
613 // Flipmode |
|
614 //U8X8_C(0x0a0), /* ADC */ |
|
615 //U8X8_C(0x0c8), /* common output mode */ |
|
616 |
|
617 U8X8_C(0x0a6), /* display normal, bit val 0: LCD pixel off. */ |
|
618 U8X8_C(0x0a2), /* LCD bias 1/9 */ |
|
619 U8X8_C(0x028|4), /* all power control circuits on */ |
|
620 U8X8_DLY(50), |
|
621 U8X8_C(0x028|6), /* all power control circuits on */ |
|
622 U8X8_DLY(50), |
|
623 U8X8_C(0x028|7), /* all power control circuits on */ |
|
624 U8X8_DLY(50), |
|
625 |
|
626 U8X8_C(0x024), /* v0 voltage resistor ratio, taken from issue 657 */ |
|
627 U8X8_CA(0x081, 0x080), /* set contrast, contrast value*/ |
|
628 |
|
629 U8X8_C(0x0ae), /* display off */ |
|
630 U8X8_C(0x0a5), /* enter powersafe: all pixel on, issue 142 */ |
|
631 |
|
632 U8X8_END_TRANSFER(), /* disable chip */ |
|
633 U8X8_END() /* end of sequence */ |
|
634 }; |
|
635 |
|
636 |
|
637 uint8_t u8x8_d_st7567_64x32(u8x8_t *u8x8, uint8_t msg, uint8_t arg_int, void *arg_ptr) |
|
638 { |
|
639 uint8_t x, c; |
|
640 uint8_t *ptr; |
|
641 switch(msg) |
|
642 { |
|
643 case U8X8_MSG_DISPLAY_SETUP_MEMORY: |
|
644 u8x8_d_helper_display_setup_memory(u8x8, &u8x8_st7567_64x32_display_info); |
|
645 break; |
|
646 case U8X8_MSG_DISPLAY_INIT: |
|
647 u8x8_d_helper_display_init(u8x8); |
|
648 u8x8_cad_SendSequence(u8x8, u8x8_st7567_64x32_init_seq); |
|
649 break; |
|
650 case U8X8_MSG_DISPLAY_SET_POWER_SAVE: |
|
651 if ( arg_int == 0 ) |
|
652 u8x8_cad_SendSequence(u8x8, u8x8_d_st7567_132x64_powersave0_seq); |
|
653 else |
|
654 u8x8_cad_SendSequence(u8x8, u8x8_d_st7567_132x64_powersave1_seq); |
|
655 break; |
|
656 case U8X8_MSG_DISPLAY_SET_FLIP_MODE: |
|
657 if ( arg_int == 0 ) |
|
658 { |
|
659 u8x8_cad_SendSequence(u8x8, u8x8_d_st7567_132x64_flip0_seq); |
|
660 u8x8->x_offset = u8x8->display_info->default_x_offset; |
|
661 } |
|
662 else |
|
663 { |
|
664 u8x8_cad_SendSequence(u8x8, u8x8_d_st7567_132x64_flip1_seq); |
|
665 u8x8->x_offset = u8x8->display_info->flipmode_x_offset; |
|
666 } |
|
667 break; |
|
668 #ifdef U8X8_WITH_SET_CONTRAST |
|
669 case U8X8_MSG_DISPLAY_SET_CONTRAST: |
|
670 u8x8_cad_StartTransfer(u8x8); |
|
671 u8x8_cad_SendCmd(u8x8, 0x081 ); |
|
672 u8x8_cad_SendArg(u8x8, arg_int >> 2 ); /* st7567 has range from 0 to 63 */ |
|
673 u8x8_cad_EndTransfer(u8x8); |
|
674 break; |
|
675 #endif |
|
676 case U8X8_MSG_DISPLAY_DRAW_TILE: |
|
677 u8x8_cad_StartTransfer(u8x8); |
|
678 |
|
679 x = ((u8x8_tile_t *)arg_ptr)->x_pos; |
|
680 x *= 8; |
|
681 x += u8x8->x_offset; |
|
682 u8x8_cad_SendCmd(u8x8, 0x010 | (x>>4) ); |
|
683 u8x8_cad_SendCmd(u8x8, 0x000 | ((x&15))); |
|
684 u8x8_cad_SendCmd(u8x8, 0x0b0 | (((u8x8_tile_t *)arg_ptr)->y_pos)); |
|
685 |
|
686 c = ((u8x8_tile_t *)arg_ptr)->cnt; |
|
687 c *= 8; |
|
688 ptr = ((u8x8_tile_t *)arg_ptr)->tile_ptr; |
|
689 /* |
|
690 The following if condition checks the hardware limits of the st7567 |
|
691 controller: It is not allowed to write beyond the display limits. |
|
692 This is in fact an issue within flip mode. |
|
693 */ |
|
694 if ( c + x > 132u ) |
|
695 { |
|
696 c = 132u; |
|
697 c -= x; |
|
698 } |
|
699 do |
|
700 { |
|
701 u8x8_cad_SendData(u8x8, c, ptr); /* note: SendData can not handle more than 255 bytes */ |
|
702 arg_int--; |
|
703 } while( arg_int > 0 ); |
|
704 |
|
705 u8x8_cad_EndTransfer(u8x8); |
|
706 break; |
|
707 default: |
|
708 return 0; |
|
709 } |
|
710 return 1; |
|
711 } |