comparison: components/esp32-owb/include/owb_rmt_bus_symbols.h
components/esp32-owb/include/owb_rmt_bus_symbols.h
- changeset 72
- acc1904cd70d
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| 71:995557380e5f | 72:acc1904cd70d |
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| 1 /** | |
| 2 * Copyright (c) 2023 mjcross | |
| 3 * | |
| 4 * SPDX-License-Identifier: MIT | |
| 5 **/ | |
| 6 | |
| 7 #include "owb_rmt_bus_timings.h" | |
| 8 | |
| 9 // RMT transmit channel symbols for the onewire bus signals and conditions | |
| 10 // | |
| 11 | |
| 12 // basic bus levels | |
| 13 // ---------------- | |
| 14 // note: we configure the transmit channel to be hardware inverted, | |
| 15 // so that the bus initialises in the 'released' state | |
| 16 #define OWB_RMT_BUS_ASSERTED 1 | |
| 17 #define OWB_RMT_BUS_RELEASED 0 | |
| 18 | |
| 19 // bus symbols as `rmt_symbol_word_t` | |
| 20 // ---------------------------------- | |
| 21 | |
| 22 // send 'zero' bit | |
| 23 #define OWB_RMT_SYMBOL_0BIT { \ | |
| 24 .level0 = OWB_RMT_BUS_ASSERTED, \ | |
| 25 .duration0 = OWB_TIMING_PARAM_C, \ | |
| 26 .level1 = OWB_RMT_BUS_RELEASED, \ | |
| 27 .duration1 = OWB_TIMING_PARAM_D } | |
| 28 | |
| 29 // send 'one' bit | |
| 30 #define OWB_RMT_SYMBOL_1BIT { \ | |
| 31 .level0 = OWB_RMT_BUS_ASSERTED, \ | |
| 32 .duration0 = OWB_TIMING_PARAM_A, \ | |
| 33 .level1 = OWB_RMT_BUS_RELEASED, \ | |
| 34 .duration1 = OWB_TIMING_PARAM_B } | |
| 35 | |
| 36 // send bus reset | |
| 37 #define OWB_RMT_SYMBOL_RESET { \ | |
| 38 .level0 = OWB_RMT_BUS_ASSERTED, \ | |
| 39 .duration0 = OWB_TIMING_PARAM_H, \ | |
| 40 .level1 = OWB_RMT_BUS_RELEASED, \ | |
| 41 .duration1 = OWB_TIMING_PARAM_I + OWB_TIMING_PARAM_J } | |
| 42 |
